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PCS3P7303A General Purpose Peak EMI Reduction IC
General Features
* 1x, LVCMOS Peak EMI Reduction * Input frequency: 10MHz - 70MHz @ 2.5V 10MHz - 80MHz @ 3.3V * Output frequency: 10MHz - 70MHz @ 2.5V 10MHz - 80MHz @ 3.3V * Analog Deviation Selection * ModRate selection option * Supply Voltage: 2.5V 0.2V 3.3V 0.3V * 8-pin TSSOP, 8L 2mmX2mm WDFN(TDFN) Packages * The First True Drop-in Solution locks on to it delivering a 1x modulated clock output. PCS3P7303A has a Frequency Selection (FS) control that facilitates selecting one of the two frequency ranges within the operating frequency range. Refer to the Frequency Selection Table for details. PCS3P7303A has an SSEXTR pin to select different deviations depending upon the value of an external resistor connected between SSEXTR and GND. Modulation Rate (MR) control selects two different Modulation Rates. PCS3P7303A operates from a 3.3V/2.5V supply and is available in an 8-pin TSSOP and 8L 2mmX2mm WDFN packages.
Application
PCS3P7303A is targeted for many applications including USB and SATA.
Functional Description
PCS3P7303A is a versatile, 3.3V/2.5V Peak EMI reduction IC based on Timing-SafeTM technology. PCS3P7303A accepts an input clock either from a Crystal or from an external reference (AC or DC coupled to XIN / CLKIN) and
Block Diagram
VDD
FS
MR
XIN / CLKIN
XOUT
Crystal Oscillator
PLL
ModOUT
GND
SSEXTR
(c)2010 SCILLC. All rights reserved. JANUARY 2010 - Rev. 2
Publication Order Number: PCS3P7303/D
PCS3P7303A
Pin Configuration
XIN / CLKIN 1 XOUT 2 PCS3P7303A FS 3 GND 4
8 7 6 5
VDD SSEXTR MR ModOUT
Pin Description Pin #
1 2 3 4 5 6 7 8
Pin Name
XIN / CLKIN XOUT FS GND ModOUT MR SSEXTR VDD
Pin Type
I O I P O I I P
Description
Crystal connection or External reference clock input. Crystal connection. If using an external reference, this pin should be left open. Frequency Select. Pull LOW to select Low Frequency range. Selects High Frequency range when pulled HIGH. Has an internal pull-up resistor. (See Frequency Selection table for details.) Ground. Buffered Modulated clock output. Modulation Rate Select. When LOW selects Low Modulation Rate. Selects High Modulation Rate when pulled HIGH. Has an internal pull-down resistor. Analog Deviation Selection through external resistor to GND. 2.5V / 3.3V supply Voltage.
Frequency Selection Table VDD (V)
2.5 1 0 3.3 1 30-80 30-70 10-40
FS
0
Frequency (MHz)
10-35
Rev. 2 | Page 2 of 10 | www.onsemi.com
PCS3P7303A
Absolute Maximum Rating Symbol
VDD, VIN TSTG Ts TJ TDV Storage temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B)
Parameter
Rating
-0.5 to +4.6 -65 to +125 260 150 2
Unit
V C C C KV
Voltage on any input pin with respect to Ground
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability.
Operating Conditions Parameter
VDD TA CL CIN Supply Voltage Operating Temperature (Ambient Temperature) Load Capacitance Input Capacitance
Description
Min
2.3 0
Max
3.6 70 10 7
Unit
V C pF pF
DC Electrical Characteristics for 2.5V Parameter
VDD VIL VIH IIL IIH VOL VOH ICC IDD Zo
Description
Supply Voltage Input LOW Voltage Input HIGH Voltage Input LOW Current Input HIGH Current Output LOW Voltage Output HIGH Voltage Static Supply Current Dynamic Supply Current Output Impedance VIN = 0V VIN = VDD IOL = 8mA IOH = -8mA
Test Conditions
Min
2.3
Typ
2.5
Max
2.7 0.7
Unit
V V V
1.7 -50 50 0.6 1.8 500 5 12 45
A A V V A mA
XIN / CLKIN pulled low Unloaded Output FS=0; @ 10MHz FS=1; @ 70MHz
Rev. 2 | Page 3 of 10 | www.onsemi.com
PCS3P7303A
Switching Characteristics for 2.5V Parameter
Input Frequency / ModoUT Duty Cycle
2, 3 2, 3 1
Test Conditions
FS=0 FS=1 Measured at VDD /2 Measured between 20% to 80% Measured between 80% to 20% FS=0 10MHz 35MHz 30MHz 70MHz
Min
10 30 45
Typ
Max
35 70
Unit
MHz % nS nS
50 1.75 1.0 450 125 225 150
55 2.5 1.6 600 250 350 300 3
Output Rise Time Output Fall Time
2,3
Cycle-to-Cycle Jitter
3
pS
Unloaded output
FS=1
PLL Lock Time
Notes:
3
Stable power supply, valid clock presented on XIN / CLKIN
mS
1. Functionality with Crystal is guaranteed by design and characterization. Not 100% tested in production. 2. All parameters are specified with 10pF loaded outputs. 3. Parameter is guaranteed by design and characterization. Not 100% tested in production.
DC Electrical Characteristics for 3.3V Parameter
VDD VIL VIH IIL IIH VOL VOH ICC IDD Zo
Description
Supply Voltage Input LOW Voltage Input HIGH Voltage Input LOW Current Input HIGH Current Output LOW Voltage Output HIGH Voltage Static Supply Current Dynamic Supply Current Output Impedance VIN = 0V
Test Conditions
Min
3.0
Typ
3.3
Max
3.6 0.8
Unit
V V V
2.0 -50 50 0.4 2.4 700 7 20 35
A A V V A mA
VIN = VDD IOL = 8mA IOH = -8mA XIN / CLKIN pulled low Unloaded Output FS=0; @ 10MHz FS=1; @ 80MHz
Rev. 2 | Page 4 of 10 | www.onsemi.com
PCS3P7303A
Switching Characteristics for 3.3V Parameter
Input Frequency / ModOUT Duty Cycle
2, 3 2, 3 1
Test Conditions
FS=0 FS=1 Measured at VDD /2 Measured between 20% to 80% Measured between 80% to 20% FS=0 10MHz 40MHz 30MHz 80MHz
Min
10 30 45
Typ
Max
40 80
Unit
MHz % nS nS
50 1.3 0.9 450 125 225 125
55 2 1.3 600 250 350 250 3
Output Rise Time Output Fall Time
2, 3
Cycle-to-Cycle Jitter
3
Unloaded output FS=1
pS
PLL Lock Time
Notes:
3
Stable power supply, valid clock presented on XIN / CLKIN
mS
1. Functionality with Crystal is guaranteed by design and characterization. Not 100% tested in production. 2. All parameters are specified with10pF loaded outputs. 3. Parameter is guaranteed by design and characterization. Not 100% tested in production.
Typical Crystal Specifications Fundamental AT cut parallel resonant crystal
Nominal frequency Frequency tolerance Operating temperature range Storage temperature Load capacitance(CP) Shunt capacitance ESR 25MHz 50ppm or better at 25 C -25 to +85 C C -40 to +85 C C 18pF 7pF maximum 25
Note: CL is the Load Capacitance and R1 is used to prevent oscillations at overtone frequency of the Fundamental frequency.
Typical Crystal Interface Circuit
PCS3P7303A
R
XIN / CLKIN
XOUT Crystal R1
CL
CL
CL = 2*(CP - CS), Where CP = Load capacitance of crystal from crystal vendor datasheet. CS = Stray capacitance due to CIN, PCB, Trace, etc.
Rev. 2 | Page 5 of 10 | www.onsemi.com
PCS3P7303A
Switching Waveforms
Duty Cycle Timing
t1 t2
VDD/2 OUTPUT
VDD/2
VDD/2
Output Rise/Fall Time
80% 20%
80% 20%
OUTPUT t3 t4
Application Schematic
Noise Reduction Filter R C 0.1uF VDD
CLKIN
1 XIN/CLKIN 2
XOUT
VDD 8 SSEXTR 7
VDD 0
External Deviation Control VDD R Analog Deviation Control
SSEXTR can be Pulled HIGH to turn OFF Deviation.
3 FS
0
MR
6
0 0
4 GND
ModOUT 5
Note: FS (Pin#3) MR (Pin#6): Connect to VDD or GND Refer to Pin Description table for Functionality details.
Note: For AC Coupled Interface refer to Application Brief: CT100801.
Rev. 2 | Page 6 of 10 | www.onsemi.com
PCS3P7303A
Charts
Deviation Vs Resistance (FS=0, MR=0) 2.00 1.75 1.50 Deviation(% ) 1.25 1.00 0.75 0.50 0.25 0.00 0 20 40 60 80 100 120 140 160 180 200 220 240 Resistance (K ) Deviation(% ) 12M 27M 33M 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0.00 0 20 40 60 80 100 120 140 160 180 200 220 240 Resistance (K ) Deviation Vs Resistance (FS=0, MR=1) 12M 27M 33M
Deviation Vs Resistance (FS=1, MR=0) 2.00 1.75 1.50 Deviation(% ) 1.25 1.00 0.75 0.50 0.25 0.00 0 20 40 60 80 100 120 140 160 180 200 220 240 Resistance (K ) Deviation(% ) 33M 40M 50M 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0.00 0 20 40
Deviation Vs Resistance (FS=1, MR=1) 33M 40M 50M
60
80 100 120 140 160 180 200 220 240 Resistance (K )
Note: Device to Device variation of Deviation is 10%.
Rev. 2 | Page 7 of 10 | www.onsemi.com
PCS3P7303A
Package Information
8-lead TSSOP Package (4.40-MM Body)
H
E D A2 A e B A1 L C
Dimensions Symbol Min
A A1 A2 B c D E e H L 0.002 0.033 0.008 0.004 0.114 0.169
Inches Max
0.043 0.006 0.037 0.012 0.008 0.122 0.177
Millimeters Min Max
1.10 0.05 0.85 0.19 0.09 2.90 4.30 0.15 0.95 0.30 0.20 3.10 4.50
0.026 BSC 0.252 BSC 0.020 0 0.028 8
0.65 BSC 6.40 BSC 0.50 0 0.70 8
Rev. 2 | Page 8 of 10 | www.onsemi.com
PCS3P7303A
8L 2mmX2mm WDFN package Outline drawing
Dimensions Symbol
A A3 b D E e L
Inches Min
0.027 0.008
Millimeters Max Min
0.70 0.20
Max
0.80 0.203 BSC 0.30 2.00 BSC 2.00 BSC 0.50 BSC
0.0315 0.012
0.008 BSC 0.079 BSC 0.078 BSC 0.020 BSC 0.020 0.024 0.50
0.60
Rev. 2 | Page 9 of 10 | www.onsemi.com
PCS3P7303A
Ordering Code Part Number
PCS3P7303AG-08TR PCS3P7303AG-08TT PCS3P7303AG-08CR
Marking
BKL BKL BK
Package
8-pin TSSOP, TAPE AND REEL, Green 8-pin TSSOP, TUBE, Green 8L WDFN (2mmX2mm), TAPE & REEL, Green
Temperature
0 to +70 C C 0 t o +70 C C 0 to +70 C C
A "microdot" placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free.
Note: Many ON Semiconductor products are protected by issued patents or applications for patent. are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes ON Semiconductor and without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. U.S Patent Pending; Timing-Safe and Active Bead are trademarks of PulseCore Semiconductor, a wholly owned subsidiary of ON Semiconductor. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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